FIG. 1 is a block diagram illustrating a split media access and control (MAC) architecture and the interfaces between an upper MAC layer portion and lower MAC portion and a physical (PHY) layer. The interface between lower MAC portion 102 and PHY layer 104 is a hardware interface. Data information 106 and control information 108 are passed over this interface. This interface is specific to the hardware configuration of the lower MAC portion and of the PHY. The interface between upper MAC portion 100 and lower MAC portion 102 is via memory interface 110. Since memory interfaces are generally uniform, this configuration allows for different upper MAC portions, and therefore different upper MAC portion protocols, to interface to the same lower MAC portion and PHY layer components without changing the hardware interfaces. Therefore, the MAC layer protocol can change or multiple MAC protocols can be supported without change to the lower MAC portion and the PHY layer components. Only the upper MAC portion is dependent on the MAC protocol; the lower MAC portion is independent of the MAC protocol. Having a universal interface information structure also makes the upper MAC to lower MAC interface universal.
In some embodiments, upper MAC portion functionality is performed using software which enables flexibility. In some embodiments, lower MAC portion functionality is performed using hardware which enables faster performance. However, because there are situations where the upper MAC software performance may not process a message fast enough to provide certain responses within a required time. A technique is required to accelerate responses when a split MAC architecture is used.